1. Field of the Invention
The present invention relates to a semi-conductor integrated device such as a dynamic metal-insulator-semiconductor (MIS) random access memory (RAM) having a plurality of pairs of undecided voltage portions which are in an undecided (floating) state for a certain time, and a plurality of sense amplifiers for amplifying a small difference in potential between each pair of undecided (floating) voltage portions.
2. Description of the Related Art
Recently, the integration and fining of the structure of a semiconductor integrated device such as a MIS memory device has become greater, and this has given rise to serious problems with regard to the conductor-spacing capacities between internal connections.
For example, in a MIS memory device, a pair of undecided (floating) voltage portions, such as a pair of folded bit lines which are in an undecided state, i.e., in a floating state, for a certain time are provided, and a small difference in potential therebetween corresponding to a content of a memory cell is amplified by a sense amplifier for such a time to generate the content therefrom. In this case, an operation clock signal line crosses over or down the bit lines. Therefore, conductor-spacing capacities exist between one of the bit lines and the operation clock signal line and between the other bit line and the operation clock signal line, and in this case, the two conductor-spacing capacities are the same.
On the other hand, a decided (non-floating) voltage portion, such as a power supply line for the sense amplifier, may be arranged near the bit lines. Here too conductor-spacing capacities exist between one of the bit lines and the power supply line and between the other of the bit lines and the power supply line. In this case, however, the two capacities are different from each other.
Thus, in an undecided (floating) state of the bit lines, even when the potential at the operation clock signal line is changed, a small difference in potential occurs between the bit lines, due to the difference in capacity of the bit lines with respect to the power supply line. Therefore, when a difference in potential corresponding to the content of a memory cell is added to the above-mentioned difference in potential between the bit lines, the sense amplifier may be erroneously operated. This will be discussed later in detail.